Improved read/write assist mechanism for 10‐transistor static random access memory cell

Author:

Abbasian Erfan1ORCID,Gholipour Morteza1ORCID

Affiliation:

1. Faculty of Electrical and Computer Engineering Babol Noshirvani University of Technology Babol Iran

Funder

Babol Noshirvani University of Technology

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Single Bitline Highly Stable, Low Power With High Speed Half-Select Disturb Free 11T SRAM Cell;ACM Transactions on Design Automation of Electronic Systems;2024-07-09

2. A FinFET-based low-power, stable 8T SRAM cell with high yield;AEU - International Journal of Electronics and Communications;2024-02

3. A robust multi-bit soft-error immune SRAM cell for low-power applications;Analog Integrated Circuits and Signal Processing;2023-01-21

4. A sub-threshold 10T FinFET SRAM cell design for low-power applications;AEU - International Journal of Electronics and Communications;2022-12

5. A review on radiation‐hardened memory cells for space and terrestrial applications;International Journal of Circuit Theory and Applications;2022-09-07

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