Power-Gated 9T SRAM Cell for Low-Energy Operation-Reference-Cited by-同舟云学术

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Power-Gated 9T SRAM Cell for Low-Energy Operation

Published:2017-03 Issue:3 Volume:25 Page:1183-1187
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Oh Tae Woo,Jeong Hanwool,Kang Kyoman,Park Juhyun,Yang Younghwi,Jung Seong-Ook^ORCID

Funder

IT R&D Program of MOTIE/KEIT through the Project entiltled Design Technology Development of ultra-low voltage operating circuit and IP for smart sensor SoC

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/7862316/07747478.pdf?arnumber=7747478

Cited by 67 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design of dual port 9T SRAM cell with parallel processing and high performance computing;Physica Scripta;2024-08-20

2. Leakage Power Attack-Resilient Design: PMOS-Reading 9T SRAM Cell;Electronics;2024-06-28

3. A fault-tolerant and energy-efficient design of RAM cell and PIM structure in quantum technology;Sustainable Computing: Informatics and Systems;2024-04

4. Secure and Reliable Single-Ended 10T SRAM Cell;2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM);2024-03-03

5. Design and Comparison of SEU Tolerant 10T Memory Cell for Radiation Environment Applications;EAI Endorsed Transactions on Energy Web;2024-02-01

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