A scalable high‐speed hybrid 1‐bit full adder design using XOR‐XNOR module

Author:

Hasan Mehedi12ORCID,Islam Sharnali3,Hossain Mainul3,Zaman Hasan U.14

Affiliation:

1. Department of Electrical and Computer Engineering North South University Dhaka Bangladesh

2. Department of Electrical and Electronic Engineering University of Science and Technology Chittagong Chattogram Bangladesh

3. Department of Electrical and Electronic Engineering University of Dhaka Dhaka Bangladesh

4. Samsung Austin R&D Center Samsung Corporation Austin Texas USA

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

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3. Wide word‐length carry‐select adder design using ripple carry and carry look‐ahead method based hybrid 4‐bit carry generator;Engineering Reports;2023-06-29

4. Quantum-Dot Cellular Automata-Based Full Adder Design: Comprehensive Review and Performance Comparison;Advances in Materials Science and Engineering;2023-01-10

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