Design and Implementation of 4 Bit Carry Generator Circuit Using Pass Transistor Logic with 2 × 1 Mux Approach
Author:
Affiliation:
1. Galgotias College of Engineering and Technology,Electronics and Communication Engineering,Greater Noida,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10592860/10592845/10593549.pdf?arnumber=10593549
Reference15 articles.
1. A high-speed 4-bit Carry Look-Ahead architecture as a building block for wide word-length Carry-Select Adder
2. Wide word‐length carry‐select adder design using ripple carry and carry look‐ahead method based hybrid 4‐bit carry generator
3. A scalable high‐speed hybrid 1‐bit full adder design using XOR‐XNOR module
4. Design and implementation of 20-T hybrid full adder for high-performance arithmetic applications
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