Hier-3D: A Hierarchical Physical Design Methodology for Face-to-Face-Bonded 3D ICs-Reference-Cited by-同舟云学术

Hier-3D: A Hierarchical Physical Design Methodology for Face-to-Face-Bonded 3D ICs

Published:2022-08 Issue: Volume: Page:
ISSN:
Container-title:ACM/IEEE International Symposium on Low Power Electronics and Design
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Author:

Agnesina Anthony¹,Brunion Moritz²,Garcia-Ortiz Alberto²,Catthoor Francky³,Milojevic Dragomir³,Komalan Manu³,Cavalcante Matheus⁴,Riedel Samuel⁴,Benini Luca⁵,Lim Sung Kyu¹

Affiliation:

1. Georgia Tech, United States

2. University of Bremen, Germany

3. IMEC, Belgium

4. ETH Zurich, Switzerland

5. Università di Bologna and ETH Zurich, Italy

Publisher

ACM

Reference8 articles.

1. Power, Performance, Area and Cost Analysis of Memory-on-Logic Face-to-Face Bonded 3D Processor Designs

2. Lennart Bamberg 2020 . Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs. In 2020 Design , Automation Test in Europe Conference Exhibition (DATE). Lennart Bamberg 2020. Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs. In 2020 Design, Automation Test in Europe Conference Exhibition (DATE).

3. Scalable, sub 2μm pitch, Cu/SiCN to Cu/SiCN hybrid wafer-to-wafer bonding technology

4. Matheus Cavalcante 2021 . MemPool: A Shared-L1 Memory Many-Core Cluster with a Low-Latency Interconnect. In 2021 Design , Automation Test in Europe Conference Exhibition (DATE). Matheus Cavalcante 2021. MemPool: A Shared-L1 Memory Many-Core Cluster with a Low-Latency Interconnect. In 2021 Design, Automation Test in Europe Conference Exhibition (DATE).

5. Assembling 2-D Blocks Into 3-D Chips

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1. GPU/ML-Enhanced Large Scale Global Routing Contest;Proceedings of the 2024 International Symposium on Physical Design;2024-03-12

2. INVITED: Design Automation Needs for Monolithic 3D ICs: Accomplishments and Gaps;2023 60th ACM/IEEE Design Automation Conference (DAC);2023-07-09

3. Design Enablement of 3-Dies Stacked 3D-ICs Using Fine-Pitch Hybrid-Bonding and TSVs;2023 IEEE International 3D Systems Integration Conference (3DIC);2023-05-10

4. Power, Performance, Area, and Cost Analysis of Face-to-Face-Bonded 3-D ICs;IEEE Transactions on Components, Packaging and Manufacturing Technology;2023-03

5. Hier-3D: A Methodology for Physical Hierarchy Exploration of 3D ICs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023