INVITED: Design Automation Needs for Monolithic 3D ICs: Accomplishments and Gaps
Author:
Affiliation:
1. Georgia Institute of Technology,School of Electrical and Computer Engineering
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10247654/10247655/10247666.pdf?arnumber=10247666
Reference25 articles.
1. Through-silicon-via management during 3D physical design: When to add and how many?
2. Micro-bumping, Hybrid Bonding, or Monolithic? A PPA Study for Heterogeneous 3D IC Options
3. Snap-3D: A Constrained Placement-Driven Physical Design Methodology for High Performance 3D ICs;vanna-iampikul;Trans Comput -Aided Des Integr Circuits Syst,2022
4. Placement-Driven Partitioning for Congestion Mitigation in Monolithic 3D IC Designs
5. Design Automation and Test Solutions for Monolithic 3D ICs
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