Power, Performance, Area and Cost Analysis of Memory-on-Logic Face-to-Face Bonded 3D Processor Designs

Author:

Agnesina Anthony,Brunion Moritz,Kim Jinwoo,Garcia-Ortiz Alberto,Milojevic Dragomir,Catthoor Francky,Perumkunnil Manu,Lim Sung Kyu

Publisher

IEEE

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Cross-Die Optimization for Logic-on-Memory Face-to-Face Bonding 3-D IC Designs;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10

2. Multi-Product Optimization for 3D Heterogeneous Integration with D2W Bonding;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28

3. Power, Performance, Area, and Cost Analysis of Face-to-Face-Bonded 3-D ICs;IEEE Transactions on Components, Packaging and Manufacturing Technology;2023-03

4. Hier-3D: A Hierarchical Physical Design Methodology for Face-to-Face-Bonded 3D ICs;ACM/IEEE International Symposium on Low Power Electronics and Design;2022-08

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