Hier-3D: A Methodology for Physical Hierarchy Exploration of 3D ICs-Reference-Cited by-同舟云学术

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Hier-3D: A Methodology for Physical Hierarchy Exploration of 3D ICs

Published:2023 Issue: Volume: Page:1-1
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Bethur Nesara Eranna^ORCID,Agnesina Anthony^ORCID,Brunion Moritz^ORCID,Garcia-Ortiz Alberto^ORCID,Catthoor Francky^ORCID,Milojevic Dragomir,Komalan Manu^ORCID,Cavalcante Matheus,Riedel Samuel^ORCID,Benini Luca^ORCID,Lim Sung Kyu^ORCID

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx7/43/6917053/10360271.pdf?arnumber=10360271

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Study of Low Temperature SoIC Targeting 200 nm Bond Pitch;2024 IEEE 74th Electronic Components and Technology Conference (ECTC);2024-05-28

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