1. Dual Use Circuitry for Early Failure Warning and Test;2024 25th International Symposium on Quality Electronic Design (ISQED);2024-04-03
2. Test Point Insertion for Multi-Cycle Power-On Self-Test;ACM Transactions on Design Automation of Electronic Systems;2022-09-13
3. Enhanced DFT for Fortuitous Detection of Transition Faults During Scan Shift;2022 IEEE 31st Microelectronics Design & Test Symposium (MDTS);2022-05-23
4. Logic BIST With Capture-Per-Clock Hybrid Test Points;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2019-06
5. An efficient controlled LFSR hybrid BIST scheme;IEICE Electronics Express;2018