AC-Stress Degradation and Its Anneal in SiC MOSFETs
Author:
Affiliation:
1. U.S. Army DEVCOM-Army Research Laboratory, Adelphi, MD, USA
Funder
U.S. Army DEVCOM—Army Research Laboratory
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/9864631/09837829.pdf?arnumber=9837829
Reference19 articles.
1. On the subthreshold drain current sweep hysteresis of 4H-SiC nMOSFETs
2. Influence of High-Temperature Bias Stress on Room-Temperature VT Drift Measurements in SiC Power MOSFETs
3. Effect of dynamic threshold-voltage instability on dynamic on-state resistance in SiC MOSFETs;lelis;IEEE Trans Electron Devices,2022
4. Basic Mechanisms of Threshold-Voltage Instability and Implications for Reliability Testing of SiC MOSFETs
5. A Study of High Temperature DC and AC Gate Stressing on the Performance and Reliability of Power SiC MOSFETs
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3. Comparison of Si and SiC MOSFETs responses to electrical stress and the observation of parameter recovery in SiC MOSFET by stress superposition;Engineering Research Express;2024-08-06
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