A Low-Overhead Reconfigurable RISC-V Quad-Core Processor Architecture for Fault-Tolerant Applications-Reference-Cited by-同舟云学术

A Low-Overhead Reconfigurable RISC-V Quad-Core Processor Architecture for Fault-Tolerant Applications

Published:2022 Issue: Volume:10 Page:44136-44146
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Shukla Satyam¹^ORCID,Ray Kailash Chandra¹^ORCID

Affiliation:

1. Department of Electrical Engineering, Indian Institute of Technology Patna, Dayalpur Daulatpur, Patna, Bihar, India

Funder

Ministry of Electronics and Information Technology, Government of India, New Delhi, through the Project “Special Manpower Development Program for Chips to System Design,”

Visvesvaraya Ph.D. Scheme

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/6287639/9668973/09761919.pdf?arnumber=9761919

Reference41 articles.

1. SHAKTI-F: A Fault Tolerant Microprocessor Architecture

2. SHAKTI Processors: An Open-Source Hardware Initiative

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