Self-Heating Mitigation of TreeFETs by Interbridges-Reference-Cited by-同舟云学术

Self-Heating Mitigation of TreeFETs by Interbridges

Published:2022-08 Issue:8 Volume:69 Page:4123-4128
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Tsen Chia-Jung¹^ORCID,Chung Chia-Che¹^ORCID,Liu C. W.²^ORCID

Affiliation:

1. Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan

2. Department of Electrical Engineering, Institute of Electronics Engineering, the Graduate Institute of Photonics and Optoelectronics, and the Graduate School of Advanced Technology, National Taiwan University, Taipei, Taiwan

Funder

Ministry of Science and Technology, Taiwan

Ministry of Education, Taiwan

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/9839401/09805688.pdf?arnumber=9805688

Reference29 articles.

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2. First vertically stacked tensily strained Ge0.98Si0.02 nGAAFETs with, no parasitic channel and $\text{L}_{\textrm{G}} =40$ nm featuring record $\text{I}_{\textrm{ON}} = 48\mu\text{A}$ at $\text{V}_{\textrm{OV}} =\text{V}_{\textrm{DS}} =0.5$ V and record $\text{G}_{\textrm{m,max}}$ ($\mu\text{S} / \mu\text{m}$ )/SSSAT(mV/dec)= 8.3 at $\text{V}_{\textrm{DS}} =0.5$ V;tu;IEDM Tech Dig,2019

3. Self-heating in FinFET and GAA-NW using Si, Ge and III/V channels

4. 3D Modeling of Spatio-temporal Heat-transport in III-V Gate-all-around Transistors Allows Accurate Estimation and Optimization of Nanowire Temperature

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1. A Proposal for Optimization of Spacer Engineering at Sub-5-nm Technology Node for JL-TreeFET: A Device to Circuit Level Implementation;IEEE Transactions on Electron Devices;2024-01

2. Impact of Device-to-Device Thermal Interference Due to Self-Heating on the Performance of Stacked Nanosheet FETs;IEEE Access;2024

3. Impact of Bottom Dielectric Isolation of Si-Stacked Nanosheet Transistor on Stress and Self-Heating at 3-nm Node and Beyond;IEEE Transactions on Electron Devices;2023-11

4. Investigation of Fabricated CMOS FishboneFETs and TreeFETs With Strained SiGe Nano-Fins on Bulk-Si Substrate;IEEE Electron Device Letters;2023-09

5. Effect of Non-Ideal Cross-Sectional Shape on the Performance of Nanosheet-Based FETs;Electronics;2023-08-11