Vertical C-Shaped-Channel Nanosheet FETs Featured With Precise Control of Both Channel-Thickness and Gate-Length-Reference-Cited by-同舟云学术

Vertical C-Shaped-Channel Nanosheet FETs Featured With Precise Control of Both Channel-Thickness and Gate-Length

Published:2022-08 Issue:8 Volume:43 Page:1183-1186
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Xiao Z. R.¹^ORCID,Wang Q.²,Zhu H. L.¹,Chen Z.¹,Zhang Y. K.²^ORCID,Li J. J.²,Zhou N.²,Gao J. F.²,Ai X. Z.²,Lu S. S.²,Huang W. X.¹^ORCID,Xiong W. J.²,Kong Z. Z.¹,Xiang J. J.²^ORCID,Zhang Y.²,Zhao J.²,Liu J. B.²,Lu Y. H.²^ORCID,Bai G. B.²,He X. B.²,Du A. Y.²^ORCID,Wu Z. H.²^ORCID,Yang T.²,Li J. F.²,Luo J.¹^ORCID,Wang W. W.¹,Ye T. C.¹^ORCID

Affiliation:

1. Key Laboratory of Microelectronics Device and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China

2. Key Laboratory of Microelectronics Device & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China

Funder

Vertical Gate-All-Around (GAA) for Dynamic Random Access Memory (DRAM) and Process Development under Beijing Superstring Academy Memory Technology

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/55/9841091/09810318.pdf?arnumber=9810318

Reference19 articles.

1. Structural and Electrical Demonstration of SiGe Cladded Channel for PMOS Stacked Nanosheet Gate-All-Around Devices

2. (Invited) Epitaxy of (SiGe/Si) Superlattices for the Fabrication of Horizontal Gate-All-Around Nanosheet Transistors

3. 2nm Node: Benchmarking FinFET vs Nano-Slab Transistor Architectures for Artificial Intelligence and Next Gen Smart Mobile Devices

4. Design-technology co-optimization/system-technology co-optimization;moroz;IEDM Tech Dig,2021

5. Vertical Sandwich GAA FETs With Self-Aligned High-k Metal Gate Made by Quasi Atomic Layer Etching Process

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