Sub-10 nm Top Width Nanowire InGaAs Gate-All-Around MOSFETs With Improved Subthreshold Characteristics and Device Reliability
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials,Biotechnology
Link
http://xplorestaging.ieee.org/ielx7/6245494/9714452/09707496.pdf?arnumber=9707496
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1. Trap-assisted tunneling current through ultra-thin oxide
2. Trap-assisted tunneling in high permittivity gate dielectric stacks
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4. Electrical Characteristics of n, p-In0.53Ga0.47As MOSCAPs With In Situ PEALD-AlN Interfacial Passivation Layer
5. Plasma enhanced atomic layer deposition passivated HfO2/AlN/In0 .53Ga0 .47As MOSCAPs with sub-nanometer equivalent oxide thickness and low interface trap density;luc;IEEE Electron Device Lett,2015
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1. Inversion-mode InGaAs FinFETs for RF applications;Applied Physics Express;2023-09-01
2. Metal-Induced Trap States: The Roles of Interface and Border Traps in HfO2/InGaAs;Micromachines;2023-08-15
3. Inversion-Mode In0.53Ga0.47 As MOSFET with f T = 275 GHz and high V eff;Applied Physics Express;2023-04-01
4. Robust approach towards wearable power efficient transistors with low subthreshold swing;Materials Today Physics;2023-01
5. Process variations and short channel effects analysis in gate-all-around nanowire field-effect transistor using a statistical Taguchi-Pareto ANOVA framework;2022-10-27
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