High Temperature and Width Influence on the GIDL of Nanowire and Nanosheet SOI nMOSFETs-Reference-Cited by-同舟云学术

High Temperature and Width Influence on the GIDL of Nanowire and Nanosheet SOI nMOSFETs

Published:2023 Issue: Volume:11 Page:672-680
ISSN:2168-6734
Container-title:IEEE Journal of the Electron Devices Society
language:
Short-container-title:IEEE J. Electron Devices Soc.

Author:

De Souza Michelly¹^ORCID,Cerdeira Antonio²^ORCID,Estrada Magali²^ORCID,Barraud Sylvain³^ORCID,Cassé Mikaël³^ORCID,Vinet Maud³,Faynot Olivier³,Pavanello Marcelo Antonio¹^ORCID

Affiliation:

1. Department of Electrical Engineering, Centro Universitário FEI, São Bernardo do Campo, Brazil

2. Department of Electrical Engineering, Section of Solid-State Electronics, CINVESTAV-IPN, Mexico City, Mexico

3. Université Grenoble Alpes, CEA–Leti, Grenoble, France

Funder

CNPq

FAPESP

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials,Biotechnology

Link

http://xplorestaging.ieee.org/ielx7/6245494/10049274/10092852.pdf?arnumber=10092852

Reference31 articles.

1. Nanowire Transistors

2. 3nm GAA Technology featuring Multi-Bridge-Channel FET for Low Power and High Performance Applications

3. A Reflow-capable, Embedded 8Mb STT-MRAM Macro with 9nS Read Access Time in 16nm FinFET Logic CMOS Process

4. High-Density and High-Speed 4T FinFET SRAM for Cryogenic Computing

5. Scaling of high-k/metal-gate Trigate SOI nanowire transistors down to 10nm width

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