Evaluation of Low Temperature Silicon Nitride Spacer for High-k Metal Gate Integration-Reference-Cited by-同舟云学术

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Evaluation of Low Temperature Silicon Nitride Spacer for High-k Metal Gate Integration

Published:2013 Issue:11 Volume:2 Page:N222-N227
ISSN:2162-8769
Container-title:ECS Journal of Solid State Science and Technology
language:en
Short-container-title:ECS J. Solid State Sci. Technol.

Author:

Triyoso Dina H.,Hempel K.,Ohsiek S.,Jaschke V.,Shu J.,Mutas S.,Dittmar K.,Schaeffer J.,Utess D.,Lenski M.

Publisher

The Electrochemical Society

Subject

Electronic, Optical and Magnetic Materials

Reference14 articles.

1. 80 nm CMOSFET technology using double offset-implanted source/drain extension and low temperature SiN process

2. Improved Hot Carrier Reliability in Strained-Channel NMOSFETS with TEOS Buffer Layer

3. Crystallinity of inorganic films grown by atomic layer deposition: Overview and general trends

4. Ritala M. Leskela M. , “Atomic Layer Deposition” in Handbook of Thin Films Materials, edited by Nalwa H. S. , pp. 103–159 (2001).

5. Plasma-Assisted Atomic Layer Deposition: Basics, Opportunities, and Challenges

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