Aging comparative analysis of high-performance FinFET and CMOS flip-flops-Reference-Cited by-同舟云学术

Aging comparative analysis of high-performance FinFET and CMOS flip-flops

Published:2017-02 Issue: Volume:69 Page:52-59
ISSN:0026-2714
Container-title:Microelectronics Reliability
language:en
Short-container-title:Microelectronics Reliability

Author:

Taghipour Shiva,Asli Rahebeh Niaraki

Publisher

Elsevier BV

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference24 articles.

1. Comparative analysis of NBTI effects on low power and high performance flip–flops;Ramakrishnan,2008

2. Design of CMOS logic gates with enhanced robustness against aging degradation;Butzen;Microelectron. Reliab.,2012

3. Impact of hot carriers on nMOSFET variability in 45- and 65-nm CMOS technologies;Magnone;IEEE Electron Device Lett.,2011

4. BTI, HCI and TDDB aging impact in flip-flops;Nunes;Microelectron. Reliab.,2013

5. Low-power dual dynamic node pulsed hybrid flip-flop featuring efficient embedded logic;Absel;IEEE Trans. Very Large Scale Integr. VLSI Syst.,2013

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