Subject
Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials
Reference18 articles.
1. S.-Y. Wu, al., A 16nm FinFET CMOS technology for mobile SoC and computing applications, in: 2013 IEEE International Electron Devices Meeting, 2013, pp. 9.1.1–9.1.4.
2. Negative bias stress of MOS devices at high electric fields and degradation of MNOS devices;Jeppson;J. Appl. Phys.,1977
3. An empirical model for device degradation due to hot-carrier injection;Takeda;IEEE Electron Device Lett.,1983
4. A new TDDB degradation model based on Cu ion drift in Cu interconnect dielectrics;Suzumura,2006
5. A comparative study of lifetime reliability of planar MOSFET and FinFET due to BTI for the 16 nm CMOS technology node based on reaction-diffusion model;Mahmoud;Microelectron. Reliab.,2019
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