Quasi-planar bulk CMOS technology for improved SRAM scalability-Reference-Cited by-同舟云学术

Quasi-planar bulk CMOS technology for improved SRAM scalability

Published:2011-11 Issue: Volume:65-66 Page:184-190
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Shin Changhwan,Tsai Chen Hua,Wu Mei Hsuan,Chang Chung Fu,Liu You Ren,Kao Chih Yang,Lin Guan Shyan,Chiu Kai Ling,Fu Chuan-Shian,Tsai Cheng-tzung,Liang Chia Wen,Nikolić Borivoje,Liu Tsu-Jae King

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference12 articles.

1. Simulation of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs;Asenov;IEEE Trans Elect Dev,2003

2. Dadgour H, Endo K, De V, Banerjee K, Modeling and analysis of grain-orientation effects in emerging metal-gate devices and implications for SRAM reliability. In: IEDM tech dig; December. 2008, p. 705–8.

3. Impact of extrinsic and intrinsic parameter fluctuations on CMOS circuit performance;Bowman;IEEE J SolidState Circ,2000

4. Nii K, Yabuuchi M, Tsukamoto Y, Ohbayashi S, Oda Y, Usui K, et al. A 45-nm single-port and dual-port SRAM family with robust read/write stabilizing circuitry under DVFS environment. In: VLSI symp circuit dig, June. 2008, p. 212–3.

5. FDSOI devices with thin BOX and ground plane integration for 32nm node and below;Fenouillet-Beranger;Solid State Electron,2009

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2. Quasi-Planar Trigate (QPT) Bulk MOSFET;Variation-Aware Advanced CMOS Devices and SRAM;2016

3. Line Edge Roughness (LER);Variation-Aware Advanced CMOS Devices and SRAM;2016

4. Analysis of Random Variations and Variation-Robust Advanced Device Structures;JSTS:Journal of Semiconductor Technology and Science;2014-02-28

5. State-of-the-art silicon device miniaturization technology and its challenges;IEICE Electronics Express;2014