Quasi-Planar Trigate (QPT) Bulk MOSFET
Author:
Publisher
Springer Netherlands
Link
http://link.springer.com/content/pdf/10.1007/978-94-017-7597-7_6
Reference11 articles.
1. Bowman K et al (2000) Impact of extrinsic and intrinsic parameter fluctuations on CMOS circuit performance. Solid-State Circ IEEE J 35(8):1186–1193
2. Nii K et al (2008) A 45-nm single-port and dual-port SRAM family with robust read/write stabilizing circuitry under DVFS environment. In: Proceedings of IEEE symposium on VLSI circuits. IEEE, NY
3. Fenouillet-Beranger C et al (2009) FDSOI devices with thin BOX and ground plane integration for 32 nm node and below. Solid-State Electron 53(7):730–734
4. Kawasaki H et al (2008) Demonstration of highly scaled FinFET SRAM cells with high-κ/metal gate and investigation of characteristic variability for the 32 nm node and beyond. In: 2008 IEEE international electron devices meeting, IEDM 2008. IEEE, NY
5. Tsai CH et al (2010) Segmented tri-gate bulk CMOS technology for device variability improvement. In: Proceedings of the IEEE international symposium on VLSI technology systems and applications (VLSI-TSA)
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