Analysis of Low Power and High Speed Phase Frequency Detectors for Phase Locked Loop Design-Reference-Cited by-同舟云学术

Analysis of Low Power and High Speed Phase Frequency Detectors for Phase Locked Loop Design

Published:2015 Issue: Volume:57 Page:1081-1087
ISSN:1877-0509
Container-title:Procedia Computer Science
language:en
Short-container-title:Procedia Computer Science

Author:

Batchu Supraja,Talari Jayachandra Prasad,Nirlakalla Ravi

Publisher

Elsevier BV

Subject

General Engineering

Reference7 articles.

1. “Power amplifier resilient design for process and temperature variations using an on-chip PLL sensing signal”;Yuan;Microelectronics Reliability,2014

2. “Frequency-to-digital conversion based on a sampled Phase-Locked Loop”;Francisco Colodro;Microelectronics Journal,2013

3. “An MICS band frequency synthesizer using active inductor and auto-calibration scheme”;Hong-Yi Huang;Microelectronics Journal,2012

4. Dan H. Wolaver, “Phase Locked Loop Circuit Design”, Prentice Hall, Ch. 4, pp: 47-80.

5. B.S.” 0.18μm Phase /Frequency Detector and Charge Pump Design for Digital Video Broadcasting For Handheld's Phase-Locked-Loop Systems”;MhdZaher Al Sabbagh;MS thesis,2007

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