Author:
Duari Chusen,Birla Shilpi
Reference16 articles.
1. Power-gated 9T SRAM cell for low-energy operation;Oh;IEEE Transactions on Very Large Scale Integration (VLSI) Systems,2016
2. A 64 Mb SRAM in 32 nm high-k metal-gate SOI technology with 0.7 V operation enabled by stability, write-ability and read-ability enhancements;Pilo;IEEE Journal of Solid-State Circuits.,2011
3. Kim TH, Liu J, Keane J, Kim CH.(2007) " A high-density subthreshold SRAM with data-independent bitline leakage and virtual ground replica scheme". In2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers(pp. 330-606). IEEE.
4. Variation tolerant differential 8T SRAM cell for ultralow power applications;Pal;IEEE transactions on computer-aided design of integrated circuits and systems,2015
5. Zhang, Kai-ji, Kun Chen, Wei-tao Pan, and Pei-jun Ma.(2010) "A research of dual-port SRAM cell using 8T." In Solid-State and Integrated Circuit Technology (ICSICT), 10th IEEE International Conference on, pp. 2040-2042. IEEE.
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