ONOFIC Pull-Up Approach in Domino Logic Circuits Using FinFET for Subthreshold Leakage Reduction
Author:
Publisher
Springer Science and Business Media LLC
Subject
Applied Mathematics,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/s00034-018-0980-8.pdf
Reference25 articles.
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3. X.X. Cui, K.S. Ma, K. Liao, N. Liao, D. Wu, W. Wei, R. Li, D. S. Yu, A dynamic-adjusting threshold-voltage scheme for FinFETs low power designs, in IEEE International Symposium on Circuits and Systems (ISCAS, 2013), pp. 129–132. https://doi.org/10.1109/ISCAS.2013.6571799
4. A.K. Dadoriya, K. Khare, T.K. Gupta, R.P. Singh, Ultra-low power FinFET-based domino circuit. Int. J. Electron. 104(6), 278–285 (2017)
5. T.K. Gupta, K. Khare, Lector with footed-diode inverter: a technique for leakage reduction in domino circuits. J. Circuits Syst. Signal Process. 32, 2707–2722 (2013)
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