A 22nm 4Mb STT-MRAM Data-Encrypted Near-Memory Computation Macro with a 192GB/s Read-and-Decryption Bandwidth and 25.1-55.1TOPS/W 8b MAC for AI Operations-Reference-Cited by-同舟云学术

A 22nm 4Mb STT-MRAM Data-Encrypted Near-Memory Computation Macro with a 192GB/s Read-and-Decryption Bandwidth and 25.1-55.1TOPS/W 8b MAC for AI Operations

Published:2022-02-20 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE International Solid- State Circuits Conference (ISSCC)
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Author:

Chiu Yen-Cheng¹,Yang Chia-Sheng¹,Teng Shih-Hsin¹,Huang Hsiao-Yu¹,Chang Fu-Chun¹,Wu Yuan¹,Chien Yu-An¹,Hsieh Fang-Ling¹,Li Chung-Yuan¹,Lin Guan-Yi¹,Chen Po-Jung¹,Pan Tsen-Hsiang¹,Lo Chung-Chuan¹,Khwa Win-San²,Liu Ren-Shuo¹,Hsieh Chih-Cheng¹,Tang Kea-Tiong¹,Lo Chieh-Pu²,Chih Yu-Der²,Tsung-Yung ,Chang Jonathan²,Chang Meng-Fan¹

Affiliation:

1. National Tsing Hua University,Hsinchu,Taiwan

2. TSMC,Hsinchu,Taiwan

Funder

MOST-Taiwan

NTHU-TSMC JDP

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9731529/9731102/09731621.pdf?arnumber=9731621

Reference4 articles.

1. 13.4 A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read Bandwidth for Security-Aware Mobile Devices

2. 33.2 A Fully Integrated Analog ReRAM Based 78.4TOPS/W Compute-In-Memory Chip with Fully Parallel MAC Computing

3. HERMES Core – A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing

4. A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edae Devices;xue;ISSCC,2021

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