13.4 A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read Bandwidth for Security-Aware Mobile Devices

Author:

Chang Tung-Cheng,Chiu Yen-Cheng,Lee Chun-Ying,Hung Je-Min,Chang Kuang-Tang,Xue Cheng-Xin,Wu Ssu-Yen,Kao Hui-Yao,Chen Peng,Huang Hsiao-Yu,Teng Shih-Hsih,Chang Meng-Fan

Publisher

IEEE

Cited by 32 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. SOT-MRAM-Based LUT Cell Design for Area- and Energy-Efficient FPGA;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-09

2. Toward Energy-efficient STT-MRAM-based Near Memory Computing Architecture for Embedded Systems;ACM Transactions on Embedded Computing Systems;2024-04-25

3. Layout-Aware Area Optimization of Transposable STT-MRAM for a Processing-In-Memory System;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-02

4. A 40-nm SONOS Digital CIM Using Simplified LUT Multiplier and Continuous Sample-Hold Sense Amplifier for AI Edge Inference;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12

5. From macro to microarchitecture: reviews and trends of SRAM-based compute-in-memory circuits;Science China Information Sciences;2023-09-21

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