Analysis of submicron double-gated polysilicon MOS thin film transistors
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/878/6081/00237147.pdf?arnumber=237147
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Controllability of self-aligned four-terminal planar embedded metal double-gate low-temperature polycrystalline-silicon thin-film transistors on a glass substrate;Japanese Journal of Applied Physics;2016-02-05
2. Self-Aligned Four-Terminal Planar Metal Double-Gate Low-Temperature Polycrystalline-Silicon Thin-Film Transistors for System-on-Glass;IEICE Transactions on Electronics;2014
3. Self-Aligned Planar Metal Double-Gate Polycrystalline-Silicon Thin-Film Transistors Fabricated at Low Temperature on Glass Substrate;IEICE Transactions on Electronics;2013
4. Self-Aligned Metal Double-Gate Low-Temperature Polycrystalline Silicon Thin-Film Transistors on Glass Substrate Using Back-Surface Exposure;Japanese Journal of Applied Physics;2011-02-21
5. Low-power and high-stability SRAM technology using a laser-recrystallized p-channel SOI MOSFET;IEEE Transactions on Electron Devices;1992
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