Controllability of self-aligned four-terminal planar embedded metal double-gate low-temperature polycrystalline-silicon thin-film transistors on a glass substrate-Reference-Cited by-同舟云学术

Controllability of self-aligned four-terminal planar embedded metal double-gate low-temperature polycrystalline-silicon thin-film transistors on a glass substrate

Published:2016-02-05 Issue:3S1 Volume:55 Page:03CC01
ISSN:0021-4922
Container-title:Japanese Journal of Applied Physics
language:
Short-container-title:Jpn. J. Appl. Phys.

Author:

Ohsawa Hiroki,Sasaki Shun,Hara Akito

Publisher

IOP Publishing

Subject

General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering

Link

http://stacks.iop.org/1347-4065/55/i=3S1/a=03CC01/pdf

Reference33 articles.

1. Analysis of submicron double-gated polysilicon MOS thin film transistors

2. Kink-free polycrystalline silicon double-gate elevated-channel thin-film transistors

3. A novel self-aligned double-gate TFT technology

4. Implementation and characterization of self-aligned double-gate TFT with thin channel and thick source/drain

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1. Four-terminal polycrystalline-silicon vertical thin-film transistors on glass substrates;Japanese Journal of Applied Physics;2024-04-01

2. Bottom gate single crystal Si thin-film transistors fabricated by all sputtering processes;Japanese Journal of Applied Physics;2022-07-15

3. A Comparative Study of E-Beam Deposited Gate Dielectrics on Channel Width-Dependent Performance and Reliability of a-IGZO Thin-Film Transistors;Materials;2018-12-09

4. Performance of four-terminal low-temperature polycrystalline-silicon thin-film transistors and their application in CMOS inverters on glass substrates;Japanese Journal of Applied Physics;2018-01-24

5. Erratum: “Controllability of self-aligned four-terminal planar embedded metal double-gate low-temperature polycrystalline-silicon thin-film transistors on a glass substrate”;Japanese Journal of Applied Physics;2017-11-17