Fan-Out Wafer-Level Packaging for Heterogeneous Integration

Author:

Lau John,Li Zhang,Tan Kim Hwee,Cheung Y.M.,Ng Eric,Lo Penny,Kai Wu,Hao Ji,Wee Koh Sau,Ran Jiang,Xi Cao,Li Ming,Beica Rozalia,Lim Sze Pei,Lee N.C.,Ko Cheng-Ta,Yang Henry,Chen Y.H.,Tao Mian,Lo Jeffery,Lee Ricky,Li Margie,Chen Tony,Xu Iris,Yong Qing Xiang,Cheng Zhong,Fan Nelson,Kuah Eric

Publisher

IEEE

Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A review on warpage measurement metrologies for advanced electronic packaging;Microelectronics Reliability;2024-09

2. Advanced 3D Heterogenous Integration (3DHI) for High Frequency RF Applications;2024 IEEE Wireless and Microwave Technology Conference (WAMICON);2024-04-15

3. High toughness of nanotwinned copper lines after annealing;Materials Science and Engineering: A;2023-11

4. Chiplet Heterogeneous Integration;Semiconductor Advanced Packaging;2021

5. 2D, 2.1D, and 2.3D IC Integration;Semiconductor Advanced Packaging;2021

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