A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC-Reference-Cited by-同舟云学术

A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC

Published:2022-09-19 Issue: Volume: Page:
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Container-title:ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)
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Author:

Jia Tianyu¹,Mantovani Paolo²,Dos Santos Maico Cassel²,Giri Davide²,Zuckerman Joseph²,Loscalzo Erik Jens²,Cochet Martin³,Swaminathan Karthik³,Tombesi Gabriele²,Zhang Jeff Jun¹,Chandramoorthy Nandhini³,Wellman John-David³,Tien Kevin³,Carloni Luca²,Shepard Kenneth²,Brooks David¹,Wei Gu-Yeon¹,Bose Pradip³

Affiliation:

1. Harvard University,Cambridge,MA

2. Columbia University,New York,NY

3. IBM Research,Yorktown Heights,NY

Funder

DARPA

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9911257/9911222/09911456.pdf?arnumber=9911456

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5. KiloCore: A 32-nm 1000-Processor Computational Array

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