Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails-Reference-Cited by-同舟云学术

Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails

Published:2022-12 Issue:12 Volume:69 Page:7173-7179
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Veloso A.¹^ORCID,Jourdain A.¹^ORCID,Radisic D.¹,Chen R.¹^ORCID,Arutchelvan G.¹,O'Sullivan B.¹^ORCID,Arimura H.¹,Stucchi M.¹^ORCID,De Keersgieter A.¹^ORCID,Hosseini M.¹,Hopf T.¹,D'have K.¹,Wang S.¹,Dupuy E.¹,Mannaert G.¹,Vandersmissen K.¹,Iacovo S.¹,Marien P.¹,Choudhury S.¹,Schleicher F.¹^ORCID,Sebaai F.¹,Oniki Y.¹,Zhou X.¹^ORCID,Gupta A.¹^ORCID,Schram T.¹^ORCID,Briggs B.¹,Lorant C.¹^ORCID,Rosseel E.¹,Hikavyy A.¹,Loo R.¹^ORCID,Geypen J.¹,Batuk D.¹,Martinez G. T.¹,Soulie J. P.¹^ORCID,Devriendt K.¹^ORCID,Chan B. T.¹,Demuynck S.¹,Hiblot G.¹,Van der Plas G.¹^ORCID,Ryckaert J.¹,Beyer G.¹,Litta E. Dentoni¹^ORCID,Beyne E.¹^ORCID,Horiguchi N.¹

Affiliation:

1. Imec, Leuven, Belgium

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/9967813/09905642.pdf?arnumber=9905642

Reference19 articles.

1. Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node

2. Buried Power Rail Metal exploration towards the 1 nm Node

3. Direct Bonding of low Temperature Heterogeneous Dielectrics

4. Extreme Wafer Thinning and nano-TSV processing for 3D Heterogeneous Integration

5. Buried Power Rails and Nano-Scale TSV: Technology Boosters for Backside Power Delivery Network and 3D Heterogeneous Integration

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3. Self-Heating Effect of Device-Circuit with Back-side Power Delivery Network beyond 3nm Node;2024 IEEE International Reliability Physics Symposium (IRPS);2024-04-14

4. Inflection Points in GAA NS-FET to C-FET Scaling Considering Impact of DTCO Boosters;IEEE Transactions on Electron Devices;2024-04

5. Impact of Backside Power Delivery Network with Buried Power Rails on Latch-up Immunity in DTCO/STCO;2023 45th Annual EOS/ESD Symposium (EOS/ESD);2023-10-02