Inflection Points in GAA NS-FET to C-FET Scaling Considering Impact of DTCO Boosters
Author:
Affiliation:
1. Belgium Research Center, Huawei Technologies Research and Development, Leuven, Belgium
2. Global TCAD Solutions, Vienna, Austria
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Link
http://xplorestaging.ieee.org/ielx7/16/10482422/10452357.pdf?arnumber=10452357
Reference21 articles.
1. World’s First GAA 3nm Foundry platform Technology (SF3) with Novel Multi-Bridge-Channel-FET (MBCFET™) Process
2. Semiconductor Innovations, from Device to System
3. E-Core Implementation in Intel 4 with PowerVia (Backside Power) Technology
4. Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails
5. Block-level Evaluation and Optimization of Backside PDN for High-Performance Computing at the A14 node
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