Bulk Electron Accumulation LDMOS With Extended Superjunction Gate
Author:
Affiliation:
1. College of Electronics Engineering, Chongqing University of Posts and Telecommunications, Chongqing, China
2. Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
Funder
National Nature Science Foundation of China
Chongqing Nature Science Foundation
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/9741401/09709503.pdf?arnumber=9709503
Reference25 articles.
1. Ultra-Low On-Resistance LDMOS With Multi-Plane Electron Accumulation Layers
2. Silicon-on-Insulator Lateral DMOS With Potential Modulation Plates and Multiple Deep-Oxide Trenches
3. A Lateral Power MOSFET With the Double Extended Trench Gate
4. Novel LDMOS With Integrated Triple Direction High-k Gate and Field Dielectrics
5. Variation of Lateral Width Technique in SoI High-Voltage Lateral Double-Diffused Metal–Oxide–Semiconductor Transistors Using High-k Dielectric
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2. A Superjunction Extended Triple Gate LDMOS with Charge Accumulation Effect;Silicon;2023-12-02
3. Multi-dimensional accumulation gate LDMOS with ultra-low specific on-resistance;Microelectronics Journal;2023-08
4. A FIN-LDMOS with Bulk Electron Accumulation Effect;Micromachines;2023-06-10
5. An Integrated Split and Dummy Gates MOSFET With Fast Turn-off and Reverse Recovery Characteristics;Chinese Physics B;2022-09-08
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