An Integrated Split and Dummy Gates MOSFET With Fast Turn-off and Reverse Recovery Characteristics

Abstract

Abstract A power MOSFET with integrated Split Gate and Dummy Gate (SD-MOS) is proposed and demonstrated by the TCAD SENTAURUS. The split gate is surrounded by the Source and shielded by the dummy gate. Consequently, the coupling area between the split gate and the Drain electrode is reduced, thus the Gate-to-Drain charge (Q GD), reverse transfer capacitance (C RSS) and turn-off loss (E off) are significantly decreased. Moreover, the MOS-Channel Diode is controlled by the dummy gate with ultra-thin gate oxide tox, which can be turned on before the parasitic P-base/N-drift diode at the reverse conduction, then the majority carriers are injected to the N-drift to attenuate the minority injection. Therefore, the reverse recovery charge (Q RR), time (T RR) and peak current (I RRM) are effectively reduced at the reverse freewheeling state. Additionally, the Specific On-Resistance (R on,sp) and Breakdown Voltage (BV) are also studied to evaluate the static properties for the proposed SD-MOS. The simulation results show that the Q GD of 6 nC/cm2, the C RSS of 1.1 pF/cm2 at the V DS of 150 V, the Q RR of 1.2 μC/cm2 and the R on,sp of 8.4 mΩ·cm2 are obtained, thus the Figures Of Merit (FOM) including Q GD × R on,sp of 50 nC·mΩ， E off × R on,sp of 0.59 mJ·mΩ and the Q RR × R on,sp of 10.1 μC·mΩ are achieved for the proposed SD-MOS.