Affiliation:
1. College of Electronics Engineering, Chongqing University of Posts and Telecommunications, Chongqing 400065, China
2. Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China
3. CSIRO Manufacturing, 36 Bradfield Road, P.O. Box 218, Lindfield, NSW 2070, Australia
Abstract
A thin Silicon-On-Insulator (SOI) LDMOS with ultralow Specific On-Resistance (Ron,sp) is proposed, and the physical mechanism is investigated by Sentaurus. It features a FIN gate and an extended superjunction trench gate to obtain a Bulk Electron Accumulation (BEA) effect. The BEA consists of two p-regions and two integrated back-to-back diodes, then the gate potential VGS is extended through the whole p-region. Additionally, the gate oxide Woxide is inserted between the extended superjunction trench gate and N-drift. In the on-state, the 3D electron channel is produced at the P-well by the FIN gate, and the high-density electron accumulation layer formed in the drift region surface provides an extremely low-resistance current path, which dramatically decreases the Ron,sp and eases the dependence of Ron,sp on the drift doping concentration (Ndrift). In the off-state, the two p-regions and N-drift deplete from each other through the gate oxide Woxide like the conventional SJ. Meanwhile, the Extended Drain (ED) increases the interface charge and reduces the Ron,sp. The 3D simulation results show that the BV and Ron,sp are 314 V and 1.84 mΩ∙cm−2, respectively. Consequently, the FOM is high, reaching up to 53.49 MW/cm2, which breaks through the silicon limit of the RESURF.
Subject
Electrical and Electronic Engineering,Mechanical Engineering,Control and Systems Engineering
Cited by
1 articles.
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