8.6 A 2.5-to-5.75GHz 5mW 0.3ps<inf>rms</inf>-jitter cascaded ring-based digital injection-locked clock multiplier in 65nm CMOS-Reference-Cited by-同舟云学术

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8.6 A 2.5-to-5.75GHz 5mW 0.3psrms-jitter cascaded ring-based digital injection-locked clock multiplier in 65nm CMOS

Published:2017-02 Issue: Volume: Page:
ISSN:
Container-title:2017 IEEE International Solid-State Circuits Conference (ISSCC)
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Author:

Coombs Daniel,Elkholy Ahmed,Nandwana Romesh Kumar,Elmallah Ahmed,Hanumolu Pavan Kumar

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7866667/7870233/07870306.pdf?arnumber=7870306

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