A 12.24-GHz MDLL With a 102-Multiplication Factor Using a Power-Gating-Based Ring Oscillator-Reference-Cited by-同舟云学术

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A 12.24-GHz MDLL With a 102-Multiplication Factor Using a Power-Gating-Based Ring Oscillator

Published:2024 Issue: Volume: Page:1-12
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Cho Yoonseo¹^ORCID,Lee Jeonghyun²,Park Suneui²^ORCID,Yoo Seyeon³^ORCID,Choi Jaehyouk⁴^ORCID

Affiliation:

1. School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea

2. Samsung Electronics, Hwaseong, South Korea

3. Qualcomm Inc, San Diego, CA, USA

4. Department of Electrical and Computer Engineering, Seoul National University (SNU), Seoul, South Korea

Funder

Samsung Electronics Company Ltd.

Ministry of Science and Information and Communications Technology

Korean Government

Korean Government (MSIT), through a Development of Intelligent Physical Layer (PHY) Interface for High-Speed Processor-in-Memory (PIM) Data Transfer

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx8/4/4359912/10620066.pdf?arnumber=10620066

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