Panel-Based Large-Scale RDL Interposer Fabricated Using 2-μm-Pitch Semi-Additive Process for Chiplet-Based Integration
Author:
Affiliation:
1. Dai Nippon Printing (DNP) Co., Ltd.,Kashiwa-shi, Chiba-ken,Japan,277-0871
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9816066/9816372/09816686.pdf?arnumber=9816686
Reference14 articles.
1. High Bandwidth Memory Interface on Organic Substrate: Challenges to Electrical Design
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4. Design and Development of High Density Fan-Out Wafer Level Package (HD-FOWLP) for Deep Neural Network (DNN) Chiplet Accelerators using Advanced Interface Bus (AIB)
5. Heterogeneous Integration Roadmap 2021 Edition, Chapter 2: High Performance Computing and Data Centers,0
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