Enhancement-Mode GaN Transistor Technology for Harsh Environment Operation-Reference-Cited by-同舟云学术

Enhancement-Mode GaN Transistor Technology for Harsh Environment Operation

Published:2023-07 Issue:7 Volume:44 Page:1068-1071
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Yuan Mengyang¹^ORCID,Niroula John¹,Xie Qingyun¹^ORCID,Rajput Nitul S.²^ORCID,Fu Kai³^ORCID,Luo Shisong³^ORCID,Das Sagar Kumar⁴^ORCID,Iqbal Abdullah Jubair Bin⁴^ORCID,Sikder Bejoy⁴^ORCID,Isamotu Mohamed Fadil⁵^ORCID,Oh Minsik¹^ORCID,Eisner Savannah R.⁶^ORCID,Senesky Debbie G.⁶^ORCID,Hunter Gary W.⁷,Chowdhury Nadim⁴^ORCID,Zhao Yuji³^ORCID,Palacios Tomás¹^ORCID

Affiliation:

1. Microsystems Technology Laboratories, Massachusetts Institute of Technology, Cambridge, MA, USA

2. Advanced Materials Research Center, Technology Innovation Institute, Abu Dhabi, United Arab Emirates

3. Department of Electrical and Computer Engineering, Rice University, Houston, TX, USA

4. Department of Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology, Dhaka, Bangladesh

5. Department of Computer Science, Johns Hopkins University, Baltimore, MD, USA

6. Department of Aeronautics and Astronautics, Stanford University, Stanford, CA, USA

7. Smart Sensing and Electronics Systems Branch, NASA Glenn Research Center, Cleveland, OH, USA

Funder

National Aeronautics and Space Administration (NASA) Hot Operating Temperature Technology (HOTTech) Program

Lockheed Martin Corporation

Air Force Office of Scientific Research

Samsung Electronics Company Ltd.

Qualcomm Inc.

Advanced Research Projects Agency-Energy

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/55/10168002/10132878.pdf?arnumber=10132878

Reference33 articles.

1. Regrowth-Free GaN-Based Complementary Logic on a Si Substrate

2. Digital Integrated Circuits on an E-Mode GaN Power HEMT Platform

3. Highly Scaled GaN Complementary Technology on a Silicon Substrate

4. SiN/in-situ-GaON Staggered Gate Stack on p-GaN for Enhanced Stability in Buried-Channel GaN p-FETs

5. Testing the Temperature Limits of GaN-Based HEMT Devices

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