A Multi-Bit CAM Design With Ultra-High Density and Energy Efficiency Based on FeFET NAND
Author:
Affiliation:
1. Research Center for Intelligent Chips and Devices, Zhejiang Laboratory, Hangzhou, China
2. School of Micro-Nano Electronics, Zhejiang University, Hangzhou, China
3. School of Microelectronics, Xidian University, Xi’an, China
Funder
National Key Research and Development Project
National Natural Science Foundation of China
Scientific Research Project of Zhejiang Laboratory
Zhejiang Province Key Research and Development Programs
Zhejiang Provincial Natural Science Foundation
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/55/10168002/10129928.pdf?arnumber=10129928
Reference21 articles.
1. Variability and disturb sources in ferroelectric 3D NANDs and comparison to Charge-Trap equivalents
2. Vertical ferroelectric HfO2 FET based on 3-D NAND architecture: Towards dense low-power memory;florent;IEDM Tech Dig,2018
3. A 3D Vertical-Channel Ferroelectric/Anti-Ferroelectric FET With Indium Oxide
4. Highly Stackable 3D Ferroelectric NAND Devices: Beyond the Charge Trap Based Memory
5. Multibit Ferroelectric FET Based on Nonidentical Double HfZrO2 for High-Density Nonvolatile Memory
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