Variability and disturb sources in ferroelectric 3D NANDs and comparison to Charge-Trap equivalents
Author:
Affiliation:
1. Applied Materials Inc.,Santa Clara,CA,USA
2. University College London,Department of Physics and Astronomy,London,UK
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9779263/9779243/09779245.pdf?arnumber=9779245
Reference9 articles.
1. Application and Benefits of Target Programming Algorithms for Ferroelectric Hf02 Transistors;zhou;2020 IEEE International Electron Devices Meeting (IEDM),0
2. Ferroelectric HfO2 Memory Transistors With High-κ Interfacial Layer and Write Endurance Exceeding 1010 Cycles
3. Experimental and theoretical verification of channel conductivity degradation due to grain boundaries and defects in 3D NAND
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