A Highly Stable Low-Energy 10T SRAM for Near-Threshold Operation
Author:
Affiliation:
1. Department of Electrical and Computer Engineering, Babol Noshirvani University of Technology, Babol, Iran
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture
Link
http://xplorestaging.ieee.org/ielx7/8919/9985434/09904303.pdf?arnumber=9904303
Reference34 articles.
1. A Reliable Low Standby Power 10T SRAM Cell With Expanded Static Noise Margins
2. A 23-mW Face Recognition Processor with Mostly-Read 5T Memory in 40-nm CMOS
3. Efficient replica bitline technique for variation‐tolerant timing generation scheme of SRAM sense amplifiers
4. Predictive evaluation of electrical characteristics of sub-22nm FinFET technologies under device geometry variations
5. A novel 6T SRAM cell with asymmetrically gate underlap engineered FinFETs for enhanced read data stability and write ability
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