A 0.64-pJ/Bit 28-Gb/s/Pin High-Linearity Single-Ended PAM-4 Transmitter With an Impedance-Matched Driver and Three-Point ZQ Calibration for Memory Interface-Reference-Cited by-同舟云学术

A 0.64-pJ/Bit 28-Gb/s/Pin High-Linearity Single-Ended PAM-4 Transmitter With an Impedance-Matched Driver and Three-Point ZQ Calibration for Memory Interface

Published:2021-04 Issue:4 Volume:56 Page:1278-1287
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Jeong Yong-Un^ORCID,Park Hyunkyu^ORCID,Hyun Changho,Chae Joo-Hyung^ORCID,Jeong Shin-Hyun^ORCID,Kim Suhwan^ORCID

Funder

Ministry of Trade, Industry & Energy (MOTIE) and Korea Semiconductor Research Consortium (KSRC) Support Program for the development of the future semiconductor device

National Research and Development Program through the National Research Foundation of Korea

Ministry of Science and ICT

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/9387173/09302604.pdf?arnumber=9302604

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