Performance trade-offs in FinFET and gate-all-around device architectures for 7nm-node and beyond
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7321935/7333477/07333521.pdf?arnumber=7333521
Cited by 62 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
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