Unravelling the Impact of Random Dopant Fluctuations on Si-Based 3nm NSFET: A NEGF Analysis
Author:
Affiliation:
1. James Watt School of Engineering, University of Glasgow,Scotland, UK
2. Institute for Computing Systems Architecture, University of Edinburgh,Scotland, UK
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10628446/10628545/10628880.pdf?arnumber=10628880
Reference8 articles.
1. Another step toward the end of Moore's law: Samsung and TSMC move to 5-nanometer manufacturing - [News]
2. Performance trade-offs in FinFET and gate-all-around device architectures for 7nm-node and beyond
3. Device Exploration of NanoSheet Transistors for Sub-7-nm Technology Node
4. Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
5. TCAD Simulation of Novel Semiconductor Devices
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