High Performance 4nm FinFET Platform (4LPE) with Novel Advanced Transistor Level DTCO for Dual-CPP/HP-HD Standard Cells
Author:
Affiliation:
1. Foundry Business, Samsung Electronics,Hwasung-City,Gyeonggi-Do,Republic of Korea
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9720433/9720494/09720656.pdf?arnumber=9720656
Reference7 articles.
1. Advancing Monolayer 2D NMOS and PMOS Transistor Integration From Growth to Van Der Waals Interface Engineering for Ultimate CMOS Scaling;dorow;Symp On VLSI Technology and Circuit T2–3,2021
2. The Complementary FET (CFET) for CMOS scaling beyond N3
3. Super Low-Power Advanced 5nm Extended Platform Technology for Extreme Low Voltage Applications;choi;Symp On VLSI Technology and Circuit T2–3,2021
4. Performance-Power Management Aware State-of – the-Art 5nm FinFET Design(5LPE) with Dual CPP from Mobile to HPC Application
5. Transistor Performance Elements for 5nm Node and Beyond;tsutsui;IEEE International Electron Devices Meeting Short-Course,2017
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