A 15-Gb/s Single-Ended NRZ Receiver Using Self-Referenced Technique With 1-Tap Latched DFE for DRAM Interfaces-Reference-Cited by-同舟云学术

A 15-Gb/s Single-Ended NRZ Receiver Using Self-Referenced Technique With 1-Tap Latched DFE for DRAM Interfaces

Published:2023-01 Issue:1 Volume:70 Page:101-105
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Kim Seongcheol¹^ORCID,Sim Jincheol²^ORCID,Park Hyunsu¹,Choi Yoonjae²^ORCID,Choi Jonghyuck²^ORCID,Kim Chulwoo²^ORCID

Affiliation:

1. Department of Semiconductor System Engineering, Korea University, Seoul, South Korea

2. Department of Electrical Engineering, Korea University, Seoul, South Korea

Funder

National Research Foundation of Korea (NRF) Grant funded by the Korea Government

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/9996096/09897068.pdf?arnumber=9897068

Reference15 articles.

1. A Duo-Binary Transceiver With Time-Based Receiver and Voltage-Mode Time-Interleaved Mixing Transmitter for DRAM Interface

2. A 9 Gb/s/ch Transceiver With Reference-Less Data-Embedded Pseudo-Differential Clock Signaling for Graphics Memory Interfaces

3. A 25 Gb/s Wireline Receiver With Feedforward and Feedback Equalizers at Analog Front-End

4. An Adaptive Offset Cancellation Scheme and Shared-Summer Adaptive DFE for 0.068 pJ/b/dB 1.62-to-10 Gb/s Low-Power Receiver in 40 nm CMOS

5. A 3.2Gbps single-ended receiver using self-reference generation technique for DRAM interface;seol;Proc IEEE Int Conf Electronics Circuits Syst (ICECS),2010

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