<i>In Situ</i> Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations-Reference-Cited by-同舟云学术

In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations

Published:2023-05 Issue:5 Volume:58 Page:1472-1486
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Lin Zhiting¹^ORCID,Tong Zhongzhen²^ORCID,Wang Fangming¹,Zhang Jin³^ORCID,Zhao Yue¹^ORCID,Sun Peng¹,Xu Tian¹,Zhang Cheng¹,Li Xingwei¹,Wu Xiulong¹^ORCID,Lu Wenjuan¹^ORCID,Peng Chunyu¹^ORCID,Zhao Qiang¹^ORCID,Chen Junning¹

Affiliation:

1. School of Integrated Circuits, Anhui University (AHU), Hefei, China

2. School of Integrated Circuit Science and Engineering, Beihang University, Beijing, China

3. School of Management Science and Engineering, Anhui University of Finance and Economics, Bengbu, China

Funder

State Key Program of the National Natural Science Foundation of China

National Key Research and Development Program of China

National Natural Science Foundation of China

National Science and Technology Major Project

Joint Funds of the National Natural Science Foundation of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/10107667/09903999.pdf?arnumber=9903999

Reference35 articles.

1. An 8T SRAM Array with Configurable Word Lines for In-Memory Computing Operation

2. In-Memory Computation of a Machine-Learning Classifier in a Standard 6T SRAM Array

3. A 4 + 2T SRAM for Searching and In-Memory Computing With 0.3-V $V_{\mathrm {DDmin}}$

4. Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips

5. A 65 nm 0.165 fJ/Bit/Search 256$\,\times\,$144 TCAM Macro Design for IPv6 Lookup Tables

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