Optimization of SiC UMOSFET Structure for Improvement of Breakdown Voltage and ON-Resistance
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/8263417/08219389.pdf?arnumber=8219389
Cited by 29 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
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3. A SEB Hardened Trench Gate DMOS with HfO2 Gate Dielectric and Decelerating Electric Field Layer in Parasitic NPN Base;2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD);2023-05-28
4. 702.3 A·cm⁻²/10.4 mΩ·cm² β-Ga₂O₃ U-Shape Trench Gate MOSFET With N-Ion Implantation;IEEE Electron Device Letters;2023-03
5. 1200 V 14 mΩ SiC MOSFET with Low Specific On-Resistance of 3.3 mΩ cm2;2022 19th China International Forum on Solid State Lighting & 2022 8th International Forum on Wide Bandgap Semiconductors (SSLCHINA: IFWS);2023-02-07
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