A Novel Super-Junction DT-MOS with Floating p Regions to Improve Short-Circuit Ruggedness

Author:

Yin Sujie1ORCID,Cao Wei1ORCID,Hu Xiarong2,Ge Xinglai1,Liu Dong1

Affiliation:

1. School of Electrical Engineering, Southwest Jiaotong University, Chengdu 611756, China

2. School of Science, Xihua University, Chengdu 610039, China

Abstract

A novel super-junction (SJ) double-trench metal oxide semiconductor field effect transistor (DT-MOS) is proposed and studied using Synopsys Sentaurus TCAD in this article. The simulation results show that the proposed MOSFET has good static performance and a longer short-circuit withstand time (tsc). The super-junction structure enables the device to possess an excellent compromise of breakdown voltage (BV) and specific on-resistance (Ron,sp). Under short-circuit conditions, the depletion of p-pillar, p-shield, and floating p regions can effectively reduce saturation current and improve short-circuit capability. The proposed device has minimum gate-drain charge (Qgd) and gate-drain capacitance (Cgd) compared with other devices. Moreover, the formation of floating p regions will not lead to an increase in process complexity. Therefore, the proposed MOSFET can maintain good dynamic and static performance and short-circuit ability together without increasing the difficulty of the process.

Funder

Sichuan Regional Innovation Cooperation Project

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering,Mechanical Engineering,Control and Systems Engineering

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