Benefits of Design Assist Techniques on Performances and Reliability of a RRAM Macro
Author:
Affiliation:
1. Univ. Grenoble Alpes, CEA, List,Grenoble,France,F-38000
2. Univ. Grenoble Alpes, CEA, Leti,Grenoble,France,F-38000
3. Weebit Nano Ltd
4. Univ. Grenoble Alpes, CEA, Leti now Weebit Nano Ltd
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10145914/10145815/10145984.pdf?arnumber=10145984
Reference14 articles.
1. Reliability of 28nm embedded RRAM for consumer and industrial products
2. Infineon’s microcontrollers to go RRAM with TSMC;eenewseurope.com,2023
3. eMemory and UMC Bring New ReRAM Intellectual Property to Market;design-reuse.com,2023
4. Cell-to-Cell Fundamental Variability Limits Investigation in OxRRAM Arrays
5. Advances in Emerging Memory Technologies: From Data Storage to Artificial Intelligence
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1. Smart Write Algorithm to Enhance Performances and Reliability of an RRAM Macro;IEEE Journal of Solid-State Circuits;2024-09
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4. Compute-In-Place Serial FeRAM: Enhancing Performance, Efficiency and Adaptability in Critical Embedded Systems;2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC);2023-10-16
5. RRAM Device Performances Under Capacitive-Enhanced Current Programming Scheme;IEEE Electron Device Letters;2023-07
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